Physical Memory Organization of 8086

Physical Memory Organization of 8086

The 8086 microprocessor has a physical memory space of 1 megabyte (2^20 bytes), which is divided into several segments. The physical memory organization of the 8086 microprocessor is as follows:

Code Segment (CS): This segment is used to store the program code. The code segment is a read-only segment, and any attempt to write to this segment will result in a protection fault.

Data Segment (DS): This segment is used to store data used by the program. This segment is used for variables, arrays, and data structures. The data segment is a read-write segment, and the program can read from and write to this segment.

Stack Segment (SS): This segment is used to store the stack used by the program. The stack is a data structure used to store temporary data during the execution of the program. The stack segment is a read-write segment, and the program can read from and write to this segment.

Extra Segment (ES): This segment is an additional data segment that can be used to store additional data used by the program. This segment is a read-write segment, and the program can read from and write to this segment.

Code and Data Segment Registers: The code and data segment registers (CS and DS) contain the starting address of the code and data segments, respectively. These registers are used by the processor to access the memory.

Segment Offset Address: The segment offset address is used to calculate the physical address of the memory location. The physical address is calculated by adding the contents of the segment register and the offset address.

Physical Address Space: The physical address space of the 8086 microprocessor is 1 megabyte, which is divided into 16-bit segments. Each segment can address up to 64 kilobytes of memory.

Memory Mapping: The memory in the physical address space of the 8086 microprocessor is mapped to the memory on the system bus. The memory on the system bus is mapped to the physical address space in a linear manner.

In summary, the physical memory organization of the 8086 microprocessor is divided into several segments, including the code, data, stack, and extra segments. Each segment is used to store specific types of data, and the processor uses segment registers to access the memory. The physical address space of the 8086 microprocessor is 1 megabyte, and each segment can address up to 64 kilobytes of memory. The memory in the physical address space is mapped to the memory on the system bus in a linear manner.

Physical Address Calculation Process

In the 8086 microprocessor, the physical address is calculated using the segment offset address. The physical address is the actual address used to access memory, and it is calculated by combining the contents of the segment register and the offset address.

The segment register contains a 16-bit value that points to the beginning of a memory segment, while the offset address is a 16-bit value that represents the distance from the beginning of the segment to the desired memory location.

To calculate the physical address, the processor multiplies the contents of the segment register by 16 (which is equivalent to a left shift by 4 bits), and then adds the offset address to the result. This operation is also known as the effective address calculation.

The formula for calculating the physical address is as follows:

Physical Address = (Segment Register * 16) + Offset Address

For example, if the CS register contains the value 0x1000, and the IP register contains the value 0x0010, the effective address calculation would be:

Effective Address = (CS 16) + IP = (0x1000 16) + 0x0010 = 0x10010

In this example, the physical address is 0x10010, which is the actual address used to access memory.

Once the physical address is calculated, the processor can use it to read or write data from the memory location. The memory access is performed using the data bus and control signals, which are generated by the processor based on the physical address and the type of operation (read or write).